NANOLOGIC Trademark

Trademark Overview

On Tuesday, December 4, 2007, a trademark application was filed for NANOLOGIC with the United States Patent and Trademark Office. The USPTO has given the NANOLOGIC trademark a serial number of 77344200. The federal status of this trademark filing is ABANDONED - FAILURE TO RESPOND OR LATE RESPONSE as of Friday, June 3, 2011. The NANOLOGIC trademark is filed in the Computer & Software Services & Scientific Services category with the following description:

Design of computer circuit boards, computer chips and computer processing units which attach to a computer by means of a universal serial bus, circuits, computers, and systems all of which implement analogues of mathematical expressions of set logic
nanologic

General Information

Serial Number77344200
Word MarkNANOLOGIC
Filing DateTuesday, December 4, 2007
Status602 - ABANDONED - FAILURE TO RESPOND OR LATE RESPONSE
Status DateFriday, June 3, 2011
Registration Number0000000
Registration DateNOT AVAILABLE
Mark Drawing4000 - Illustration: Drawing with word(s) / letter(s) / number(s) in Block form
Published for Opposition DateNOT AVAILABLE

Trademark Statements

Goods and ServicesDesign of computer circuit boards, computer chips and computer processing units which attach to a computer by means of a universal serial bus, circuits, computers, and systems all of which implement analogues of mathematical expressions of set logic
Pseudo MarkNANO LOGIC

Classification Information

International Class042 - Scientific and technological services and research and design relating thereto; industrial analysis and research services; design and development of computer hardware and software.
US Class Codes100, 101
Class Status Code6 - Active
Class Status DateFriday, December 7, 2007
Primary Code042
First Use Anywhere DateNOT AVAILABLE
First Use In Commerce DateNOT AVAILABLE

Trademark Owner History

Party NameNOT AVAILABLE
Party Type10 - Original Applicant
Legal Entity Type01 - Individual
AddressWalnut Creek, CA 94596

Trademark Events

Event DateEvent Description
Friday, June 3, 2011ABANDONMENT NOTICE MAILED - FAILURE TO RESPOND
Friday, June 3, 2011ABANDONMENT - FAILURE TO RESPOND OR LATE RESPONSE
Thursday, October 21, 2010NOTIFICATION OF NON-FINAL ACTION E-MAILED
Thursday, October 21, 2010NON-FINAL ACTION E-MAILED
Thursday, October 21, 2010NON-FINAL ACTION WRITTEN
Thursday, February 11, 2010LIE CHECKED SUSP - TO ATTY FOR ACTION
Thursday, February 11, 2010ASSIGNED TO LIE
Friday, August 7, 2009NOTIFICATION OF LETTER OF SUSPENSION E-MAILED
Friday, August 7, 2009LETTER OF SUSPENSION E-MAILED
Friday, August 7, 2009SUSPENSION LETTER WRITTEN
Tuesday, July 14, 2009TEAS/EMAIL CORRESPONDENCE ENTERED
Monday, July 13, 2009CORRESPONDENCE RECEIVED IN LAW OFFICE
Monday, July 13, 2009TEAS RESPONSE TO OFFICE ACTION RECEIVED
Wednesday, July 8, 2009ATTORNEY/DOM.REP.REVOKED AND/OR APPOINTED
Wednesday, July 8, 2009TEAS REVOKE/APP/CHANGE ADDR OF ATTY/DOM REP RECEIVED
Monday, January 12, 2009NOTIFICATION OF NON-FINAL ACTION E-MAILED
Monday, January 12, 2009NON-FINAL ACTION E-MAILED
Monday, January 12, 2009NON-FINAL ACTION WRITTEN
Friday, January 9, 2009PETITION GRANTED - REMAIL OFFICE ACTION
Friday, January 9, 2009ASSIGNED TO PETITION STAFF
Monday, December 29, 2008PETITION TO REVIVE-RECEIVED
Monday, December 29, 2008PAPER RECEIVED
Friday, October 24, 2008ABANDONMENT NOTICE MAILED - FAILURE TO RESPOND
Friday, October 24, 2008ABANDONMENT - FAILURE TO RESPOND OR LATE RESPONSE
Friday, March 14, 2008NOTIFICATION OF NON-FINAL ACTION E-MAILED
Friday, March 14, 2008NON-FINAL ACTION E-MAILED
Friday, March 14, 2008NON-FINAL ACTION WRITTEN
Thursday, March 13, 2008ASSIGNED TO EXAMINER
Saturday, December 8, 2007NOTICE OF PSEUDO MARK MAILED
Friday, December 7, 2007NEW APPLICATION ENTERED IN TRAM

Related Keywords

nanologic computer which systems circuits implement computers analogues logic expressions mathematical