IP Trademark

Trademark Overview


On Tuesday, April 29, 2008, a trademark application was filed for IP with the United States Patent and Trademark Office. The USPTO has given the IP trademark a serial number of 77460733. The federal status of this trademark filing is REGISTERED AND RENEWED as of Thursday, May 20, 2021. This trademark is owned by IntelliProp Inc.. The IP trademark is filed in the Computer & Software Products & Electrical & Scientific Products and Computer & Software Services & Scientific Services categories with the following description:

Computer software for use in verifying the design of semiconductors and/or electronic systems; computer software and computer programs used for developing and testing integrated circuits; computer software to simulate system operation of integrated circuit designs; computer software for use in RTL-level simulation to carry out random pattern test control functions on integrated circuit designs; computer software program for the source code files based on Verilog and VHDL so that it simulates and/or synthesizes with no errors; computer software for use in embedded electronic systems engineering and design; software development tools for the integration of design components and automated production of Systems on Chip and electronic embedded systems; computer hardware, namely, application specific integrated circuits (ASIC) or integrated circuits (IC); computer hardware for embedded electronic systems engineering and design; firmware for host bus adapters and computer storage applications...

Computer software and hardware design for others, namely, design of application-specific integrated circuits (ASIC), integrated circuits, and electronic data automation systems to improve computer data storage; maintenance, updating, and design of computer software and programs for others relating to embedded electronic systems engineering and design, namely, VHDL and RTL coding, modeling, application, code development in C and assembler languages and tool development on computer systems
ip

General Information


Serial Number77460733
Word MarkIP
Filing DateTuesday, April 29, 2008
Status800 - REGISTERED AND RENEWED
Status DateThursday, May 20, 2021
Registration Number3915429
Registration DateTuesday, February 8, 2011
Mark Drawing3000 - Illustration: Drawing or design which also includes word(s) / letter(s) / number(s)
Published for Opposition DateTuesday, November 23, 2010

Trademark Statements


Indication of Colors claimedThe color(s) maroon is/are claimed as a feature of the mark.
Disclaimer with Predetermined Text"IP"
Description of MarkThe mark consists of the lower letter Greek phi symbol with a dot over the first curve of the symbol so as to represent the stylized letters "IP".
Goods and ServicesComputer software for use in verifying the design of semiconductors and/or electronic systems; computer software and computer programs used for developing and testing integrated circuits; computer software to simulate system operation of integrated circuit designs; computer software for use in RTL-level simulation to carry out random pattern test control functions on integrated circuit designs; computer software program for the source code files based on Verilog and VHDL so that it simulates and/or synthesizes with no errors; computer software for use in embedded electronic systems engineering and design; software development tools for the integration of design components and automated production of Systems on Chip and electronic embedded systems; computer hardware, namely, application specific integrated circuits (ASIC) or integrated circuits (IC); computer hardware for embedded electronic systems engineering and design; firmware for host bus adapters and computer storage applications; firmware, namely, to process, identify, parse, filter, store, manipulate, normalize, and recognize a digital pattern signature according to the context, or grammar, of incoming digital traffic flows; programmable and silicon chips, devices, namely, specialized, often single function or embedded, computer systems, gate array, or FPGA versions of gate-level logic, namely, for the development, modeling, simulation compiling, debugging, verification, construction, integration, or interfacing with semantic processing
Goods and ServicesComputer software and hardware design for others, namely, design of application-specific integrated circuits (ASIC), integrated circuits, and electronic data automation systems to improve computer data storage; maintenance, updating, and design of computer software and programs for others relating to embedded electronic systems engineering and design, namely, VHDL and RTL coding, modeling, application, code development in C and assembler languages and tool development on computer systems
Pseudo MarkINTELLIGENT PROP

Classification Information


International Class009 - Scientific, nautical, surveying, photographic, cinematographic, optical, weighing, measuring, signalling, checking (supervision), life-saving and teaching apparatus and instruments; apparatus and instruments for conducting, switching, transforming, accumulating, regulating or controlling electricity; apparatus for recording, transmission or reproduction of sound or images; magnetic data carriers, recording discs; automatic vending machines and mechanisms for coin operated apparatus; cash registers, calculating machines, data processing equipment and computers; fire extinguishing apparatus.
US Class Codes021, 023, 026, 036, 038
Class Status Code6 - Active
Class Status DateFriday, May 2, 2008
Primary Code009
First Use Anywhere DateMonday, January 1, 2001
First Use In Commerce DateMonday, January 1, 2001

International Class042 - Scientific and technological services and research and design relating thereto; industrial analysis and research services; design and development of computer hardware and software.
US Class Codes100, 101
Class Status Code6 - Active
Class Status DateFriday, May 2, 2008
Primary Code042
First Use Anywhere DateMonday, January 1, 2001
First Use In Commerce DateMonday, January 1, 2001

Trademark Owner History


Party NameIntelliProp Inc.
Party Type30 - Original Registrant
Legal Entity Type03 - Corporation
AddressLongmont, CO 80503

Party NameIntelliProp Inc.
Party Type20 - Owner at Publication
Legal Entity Type03 - Corporation
AddressLongmont, CO 80501

Party NameIntelliProp Inc.
Party Type10 - Original Applicant
Legal Entity Type03 - Corporation
AddressLongmont, CO 80501

Trademark Events


Event DateEvent Description
Thursday, May 20, 2021NOTICE OF ACCEPTANCE OF SEC. 8 & 9 - E-MAILED
Thursday, May 20, 2021REGISTERED AND RENEWED (FIRST RENEWAL - 10 YRS)
Thursday, May 20, 2021REGISTERED - SEC. 8 (10-YR) ACCEPTED/SEC. 9 GRANTED
Thursday, May 20, 2021CASE ASSIGNED TO POST REGISTRATION PARALEGAL
Thursday, February 11, 2021TEAS SECTION 8 & 9 RECEIVED
Saturday, February 8, 2020COURTESY REMINDER - SEC. 8 (10-YR)/SEC. 9 E-MAILED
Thursday, January 5, 2017NOTICE OF ACCEPTANCE OF SEC. 8 & 15 - E-MAILED
Thursday, January 5, 2017REGISTERED - SEC. 8 (6-YR) ACCEPTED & SEC. 15 ACK.
Thursday, January 5, 2017CASE ASSIGNED TO POST REGISTRATION PARALEGAL
Friday, October 28, 2016TEAS CHANGE OF CORRESPONDENCE RECEIVED
Friday, October 28, 2016TEAS SECTION 8 & 15 RECEIVED
Monday, February 8, 2016COURTESY REMINDER - SEC. 8 (6-YR) E-MAILED
Tuesday, February 8, 2011REGISTERED-PRINCIPAL REGISTER
Tuesday, November 23, 2010OFFICIAL GAZETTE PUBLICATION CONFIRMATION E-MAILED
Tuesday, November 23, 2010PUBLISHED FOR OPPOSITION
Monday, October 18, 2010LAW OFFICE PUBLICATION REVIEW COMPLETED
Saturday, October 16, 2010APPROVED FOR PUB - PRINCIPAL REGISTER
Friday, October 15, 2010TEAS/EMAIL CORRESPONDENCE ENTERED
Friday, October 15, 2010CORRESPONDENCE RECEIVED IN LAW OFFICE
Friday, October 15, 2010TEAS REQUEST FOR RECONSIDERATION RECEIVED
Monday, May 24, 2010NOTIFICATION OF FINAL REFUSAL EMAILED
Monday, May 24, 2010FINAL REFUSAL E-MAILED
Monday, May 24, 2010FINAL REFUSAL WRITTEN
Friday, April 30, 2010LIE CHECKED SUSP - TO ATTY FOR ACTION
Thursday, October 29, 2009REPORT COMPLETED SUSPENSION CHECK CASE STILL SUSPENDED
Friday, October 9, 2009LIE CHECKED SUSP - TO ATTY FOR ACTION
Monday, March 23, 2009NOTIFICATION OF LETTER OF SUSPENSION E-MAILED
Monday, March 23, 2009LETTER OF SUSPENSION E-MAILED
Monday, March 23, 2009SUSPENSION LETTER WRITTEN
Friday, February 27, 2009TEAS/EMAIL CORRESPONDENCE ENTERED
Friday, February 27, 2009CORRESPONDENCE RECEIVED IN LAW OFFICE
Wednesday, February 18, 2009ASSIGNED TO LIE
Tuesday, February 17, 2009TEAS RESPONSE TO OFFICE ACTION RECEIVED
Friday, August 29, 2008NOTIFICATION OF NON-FINAL ACTION E-MAILED
Friday, August 29, 2008NON-FINAL ACTION E-MAILED
Friday, August 29, 2008NON-FINAL ACTION WRITTEN
Wednesday, August 13, 2008ASSIGNED TO EXAMINER
Saturday, May 3, 2008NOTICE OF DESIGN SEARCH CODE MAILED
Friday, May 2, 2008NEW APPLICATION ENTERED IN TRAM