CHIP SCALABLE INTERFACE Trademark

Trademark Overview


On Friday, October 9, 2009, a trademark application was filed for CHIP SCALABLE INTERFACE with the United States Patent and Trademark Office. The USPTO has given the CHIP SCALABLE INTERFACE trademark a serial number of 77845637. The federal status of this trademark filing is ABANDONED - FAILURE TO RESPOND OR LATE RESPONSE as of Monday, July 12, 2010. This trademark is owned by MoSys, Inc.. The CHIP SCALABLE INTERFACE trademark is filed in the Computer & Software Products & Electrical & Scientific Products and Computer & Software Services & Scientific Services categories with the following description:

Integrated circuits, bus interfaces, macro cells, and intellectual property cores for microprocessors, microcontrollers and memories, storage devices, network processors, field programmable logic arrays

Licensing of intellectual property related to integrated circuits, bus interfaces, macro cells, and intellectual property cores for microprocessors, microcontrollers and memories, storage devices, network processors, field programmable logic arrays. Design services for designing macro cells, and intellectual property cores for microprocessors, microcontrollers and memories, storage devices, network processors, field programmable logic arrays
chip scalable interface

General Information


Serial Number77845637
Word MarkCHIP SCALABLE INTERFACE
Filing DateFriday, October 9, 2009
Status602 - ABANDONED - FAILURE TO RESPOND OR LATE RESPONSE
Status DateMonday, July 12, 2010
Registration Number0000000
Registration DateNOT AVAILABLE
Mark Drawing4000 - Illustration: Drawing with word(s) / letter(s) / number(s) in Block form
Published for Opposition DateNOT AVAILABLE

Trademark Statements


Goods and ServicesIntegrated circuits, bus interfaces, macro cells, and intellectual property cores for microprocessors, microcontrollers and memories, storage devices, network processors, field programmable logic arrays
Goods and ServicesLicensing of intellectual property related to integrated circuits, bus interfaces, macro cells, and intellectual property cores for microprocessors, microcontrollers and memories, storage devices, network processors, field programmable logic arrays. Design services for designing macro cells, and intellectual property cores for microprocessors, microcontrollers and memories, storage devices, network processors, field programmable logic arrays

Classification Information


International Class009 - Scientific, nautical, surveying, photographic, cinematographic, optical, weighing, measuring, signalling, checking (supervision), life-saving and teaching apparatus and instruments; apparatus and instruments for conducting, switching, transforming, accumulating, regulating or controlling electricity; apparatus for recording, transmission or reproduction of sound or images; magnetic data carriers, recording discs; automatic vending machines and mechanisms for coin operated apparatus; cash registers, calculating machines, data processing equipment and computers; fire extinguishing apparatus.
US Class Codes021, 023, 026, 036, 038
Class Status Code6 - Active
Class Status DateThursday, October 15, 2009
Primary Code009
First Use Anywhere DateNOT AVAILABLE
First Use In Commerce DateNOT AVAILABLE

International Class042 - Scientific and technological services and research and design relating thereto; industrial analysis and research services; design and development of computer hardware and software.
US Class Codes100, 101
Class Status Code6 - Active
Class Status DateThursday, October 15, 2009
Primary Code042
First Use Anywhere DateNOT AVAILABLE
First Use In Commerce DateNOT AVAILABLE

Trademark Owner History


Party NameMoSys, Inc.
Party Type10 - Original Applicant
Legal Entity Type03 - Corporation
AddressSunnyvale, CA 94085

Trademark Events


Event DateEvent Description
Monday, July 12, 2010ABANDONMENT NOTICE MAILED - FAILURE TO RESPOND
Monday, July 12, 2010ABANDONMENT - FAILURE TO RESPOND OR LATE RESPONSE
Monday, December 14, 2009NOTIFICATION OF NON-FINAL ACTION E-MAILED
Monday, December 14, 2009NON-FINAL ACTION E-MAILED
Monday, December 14, 2009NON-FINAL ACTION WRITTEN
Monday, December 7, 2009ASSIGNED TO EXAMINER
Thursday, October 15, 2009NEW APPLICATION OFFICE SUPPLIED DATA ENTERED IN TRAM
Tuesday, October 13, 2009NEW APPLICATION ENTERED IN TRAM